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Measurement-computing PCI-PDISO16 User Manual Page 9

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PCI-PDISO16 User's Guide Introducing the PCI-PDISO16
9
PCI-PDISO16 block diagram
The PCI-PDISO16 provides isolated input channels and relay output channels on each connector. The block
diagram shown here illustrates the board’s functionality.
PCI
CONTROLLER
BADR1
Boot
EEPROM
Control
Registers
Decode/Status
Bus
Timing
Controller FPGA and Logic
Local Bus
PCI Bus (5V, 32-BIT, 33 MHZ)
Control
Bus
Control
Interrupt
Control
+5V
+12V
-12V
BADR2
Interrupt
Control
Port A Relays 0-7
Iport A Inputs 0-7
Port B Inputs 0-7
Relay Outputs Isolated Inputs
Port B Relays 0-7
Figure 1. PCI-PDISO16 functional block diagram
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