MUX 2 to MUX 0 is the current multiplexer channel. The current channel is a binary coded number between 0 and 7 .
WRITE = CONTROL
BASE + 2 (Read / Write) Write Functions
MUX0MUX1MUX2INTEOP1OP2OP3OP4
01234567
OP4 to OP1 are the digital output lines on the 37 pin analog connector.
INTE = 1 enables interrupts (positive edge triggered) onto the PC bus IRQ selected via the IRQ jumper on the CIO-DAS08-PGA.
INTE = 0 disables the passing of the interrupt detected at pin 24 to the PC bus.
IRQ is set to 1 every time an interrupt occurs. If you want to process successive interrupts then set INTE = 1 as the last step in
your interrupt service routine.
MUX2 to MUX0. Set the current channel address by writing a binary coded number between 0 and 7 to these three bits.
NOTE
Every write to this register sets the current A/D channel MUX setting to the number in bits 2-0.
4.4 PROGRAMMABLE GAIN REGISTER
The register's layout when written to is :
BASE + 3 (Read / Write) Write Functions
R0R1R2R3XXXX
BIT 0BIT 1BIT 2BIT 3BIT 4BIT 5BIT 6BIT 7
The register's layout when read from is :
BASE + 3 (Read / Write) Read Functions
R0R1R2R3MA0MA1MA2X
BIT 0 BIT 1BIT 2BIT 3BIT 4BIT 5BIT 6BIT 7
The gain/range of a board is controlled by writing a control code to the register. The codes are as follows:
011066+
0.0051000
0111E14+
0.01500
001044+
0.05100
0011C12+
0.150
010022+
0.510
0101A10+
1.05
000000+
5.01
000188+
10.00.5
R0R1R2R3HEXDECRANGE VGAIN
CONTROL CODESBI-POLAR
CIO-DAS08-PGH
1110770 to 0.011,000
1010550 to 0.1100
1100330 to 1.010
1000110 to 10.01
R0R1R2R3HEXDECRANGE VGAIN
CONTROL CODESUNI-POLAR
CIO-DAS08-PGH
15
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