Measurement-computing CIO-DAS08-PGH User Manual

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Summary of Contents

Page 1 - October, 2000

CIO-DAS08-PGHCIO-DAS08-PGMCIO-DAS08-PGLAnalog Input & Digital I/O.Revision 9October, 2000

Page 2 - HM CIO-DAS08PGx.lwp

3.1.2 Differential InputsDifferential inputs measure the voltage between two distinct input signals. Within a certain range (referred to as the common

Page 3

Before moving on to the discussion of grounding and isolation, it is important to explain the concepts of common mode, andcommon mode range (CM Range)

Page 4 - This page is blank

If you measure reasonably stable AC and DC voltages, your system has an offset voltage between the grounds category. Thisoffset is referred to as a Co

Page 5 - 1: INTRODUCTION

3.1.9 Board and Signal Source Have Isolated GroundsSome signal sources will already be electrically isolated from the board. Figure 3-4 shows a typic

Page 6 - 1.2 HARDWARE INSTALLATION

3.2.2 Common Ground / Differential InputsThe use of differential inputs to monitor a signal source with a common ground is a acceptable configuration

Page 7

3.2.5 Common Mode Voltage > +/-10V The CIO-DAS08-PGx will not directly monitor signals with common mode voltages greater than +/-10V. You will ei

Page 8 - 2: SIGNAL CONNECTION

3.2.6 Isolated Grounds / Single-Ended InputsSingle-ended inputs can be used to monitor isolated inputs, though the use of the differential mode will i

Page 9 - 3: ANALOG CONNECTIONS

4: REGISTER ARCHITECTURE 4.1 CONTROL & DATA REGISTERSThe CIO-DAS08-PGx is controlled and monitored by writing to and reading from eight consec

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4.2 A/D DATA REGISTERBASE ADDRESS (Read / Write)0000A/D12 LSBA/D11A/D10A/D901234567READOn read, it contains the least significant four digits of the

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MUX 2 to MUX 0 is the current multiplexer channel. The current channel is a binary coded number between 0 and 7 .WRITE = CONTROLBASE + 2 (Read / Writ

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© Copyright 2000 Measurement Computing Corp.HM CIO-DAS08PGx.lwpYour new Measurement Computing product comes with a fantastic extra — Management commit

Page 13 - 3.2 WIRING CONFIGURATIONS

There are fewer ranges available for the CIO-DAS08-PGL. Gains of 2, 4 & 8 are often called binary gains. These ranges are notavailable on the Met

Page 14 - A/D Board

4.5 COUNTER LOAD & READ REGISTERSCOUNTER 0BASE ADDRESS + 4 (Read / Write)D0D1D2D3D4D5D6D701234567COUNTER 1BASE ADDRESS + 5 (Read / Write) D0D1D2D3

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BCD = 1 then counter data is 4-decade Binary Coded Decimal. (9,999 max)4.7 COUNTER/TIMER The 82C54 counter/timer chip (Figure 4-1) may be used for eve

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4.8 DIGITAL INPUTThe digital inputs are simple TTL level lines. They feed into an 8-bit register which has other on-board signals fed into it. Theres

Page 17 - 4: REGISTER ARCHITECTURE

4.10 TRIGGER & INTERRUPT LOGICThe trigger logic on the CIO-DAS08-PGx is quite simple. Pin 24 of the 37 pin connector is an input to a flip-flop wh

Page 18 - 4.2 A/D DATA REGISTER

5: SPECIFICATIONS Power consumption+5V: 900 mA typical, 1125 mA maxAnalog input sectionA/D converter type AD574Resolution 12 bitsNumber of channe

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Counter sectionCounter type 82C54Configuration 3 down-counters, 16 bits eachCounter 0 - independent, user configurableSource: user connector (Counter

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EC Declaration of ConformityWe, Measurement Computing Corp., declare under sole responsibility that the product:DescriptionPart NumberCIO-DAS08-PGxto

Page 21 - 4.6 COUNTER CONTROL REGISTER

Measurement Computing Corporation 10 Commerce Way Suite 1008 Norton, Massachusetts 02766 (508) 946-5100 Fax: (508) 946-9500 E-mail: [email protected]

Page 22 - 4.7 COUNTER/TIMER

TABLE OF CONTENTS215: SPECIFICATIONS ...204.10 TRIGGER & INTERRUP

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1: INTRODUCTION There are three versions of the CIO-DAS08-PGx board, CIO-DAS08-PGL, CIO-DAS08-PGH and CIO-DAS08-PGM. (TheCIO-DAS08-PGM duplicates

Page 25 - 5: SPECIFICATIONS

1.2 HARDWARE INSTALLATION1.2.1 Base AddressThe base address of the CIO-DAS08-PGx is set by switching a bank of DIPswitches on the board (Figure 1-1).

Page 26 - Environmental

The following table shows some typical interrupt assignments on a PC. The CIO-DAS08-PGx use interrupt levels 2 through 7.The levels most often availa

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2: SIGNAL CONNECTION 2.1 CONNECTOR DIAGRAMThe analog connector is a 37-pin, D-type connector accessible from the rear ofthe PC through the expansi

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3: ANALOG CONNECTIONS 3.1 ANALOG INPUTSPrior to jumping into actual connection schemes, you should have at least a basic understanding of Single-Ended

Related models: CIO-DAS08-PGL | CIO-DAS08-PGM |

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